A switch is a network component that retransmits a message received on one of its ports on one or more of the other ports depending on the address information contained in the message. A switch is a shared resource in the communication path. Contention for this resource is typically resolved by queuing incoming messages until the switching mechanism is free and queuing outgoing messages until the receiving device is free. Modern switches have very fast switching mechanisms to minimize the effect of network traffic on the communication latency through the switch.
A repeater is a network component that retransmits a message received on one of its ports on all of the other ports irrespective the address information contained in the message. A repeater is a shared resource in the communication path. Contention for this resource is typically resolved recognizing the contention, marking the contending messages as invalid and invoking a retransmission mechanism in the sending devices. The most familiar mechanism is the CSMA protocol of IEEE 802.3.
A switch potentially introduces multi-microsecond fluctuations in the latency between the 1588 master clock and a 1588 slave clock. Uncorrected these fluctuations will cause synchronization errors. The magnitude of these fluctuations depend on the design of the switch and the details of the communication traffic. Experiments with prototype implementations of IEEE 1588 indicate that with suitable care the effect of these fluctuations can be successfully managed. To achieve the highest accuracy a successful design will include:
A repeater potentially introduces multi-nanosecond fluctuations in the latency between the 1588 master clock and a 1588 slave clock. When compared to switch fluctuations, repeater fluctuations exhibit much more manageable statistics. Traffic patterns are not usually an issue. Experiments with prototype implementations of IEEE 1588 indicate that with suitable care the effect of these fluctuations can be successfully managed. To achieve the highest accuracy a successful design will include the use of appropriate statistics in the 1588 devices to recognized significant fluctuations (outliers) and use suitable averaging techniques in the algorithms controlling the correction of the local 1588 clock.
A switch may be designed to support IEEE 1588 while avoiding the effects of queuing. In this case two modifications to the usual design of a switch are necessary:
Such a switch will synchronize clocks directly connected to one of its ports to the highest possible accuracy.